Top Files

Polybus

Basic Top File

basic.top

basic.pin

basic.v

basic.vhd

Simple Connections

basic_connect.top

basic_connect.v

basic_connect.vhd

Shuffled Connections

basic_shuffle.top

basic_shuffle.v

basic_shuffle.vhd

File Name Override

Verilog Parameters

param.top

param.v

#module

#company

#engineer

#directory

#maxfan

#synplicity

#include

#insert

#insert_compare

#insert_script

#insert_string

#add_package

#add_sim_package

#add_syn_package

#clock

#dont_touch

#timespec

#timegrp

#tnm_net

#tnm_inst

#tnm_pin

#no_timespecs

#input_setup

#input_hold

#black_box

#state_machine

#resource_sharing_off

#pipe_off

#write_verilog

#write_vhdl

#boundary_optimization

#flatten

#synopsys

#syn_directive

#xst_directive

#buffer

#locate

#priority

#timescale

#uselib

#casesensitive

#allowtrailingnumbers

#use_defparam

#initial

#fplan

#radix26

#preserve_hierarchy

#param

#define

#parameter

#code

#preserve_signal

#low_skew

#no_clock_buffer

#synplify_attribute

#case_style

#opt_level

#opt_mode

#hierarchy_separator

#keep_hierarchy