sample.prj
set_option -technology XC4000
set_option -part 4013E
set_option -package PQ240
set_option -speed_grade -3
add_file -constraint sample.sdc
set_option -fanout_limit 100
set_option -maxfan_hard false
set_option -frequency 25
set_option -symbolic_fsm_compiler 0
set_option -resource_sharing 1
set_option -pipe 1
add_file -verilog "xc4000.v"
add_file -verilog "acc46.v"
add_file -verilog "accblock.v"
add_file -verilog "cmp46.v"
add_file -verilog "rstbuff.v"
add_file -verilog "sample_pads.v"
add_file -verilog "sample.v"