Users Manual
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HDLmaker projects are based on two types of files, Top Files which describe the hierarchy and connectivity of the design, and Pin Files which describe the pins on Verilog modules, VHDL entities and chips. In it's simplest form HDLmaker can be used to tie together a simple list of components, however HDLmaker also incorporates a C like language which can be used to generate complicated designs and even to floor plan a Xilinx FPGA.
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